Introduction to Truth Tables, Logic Expressions and Circuit Simulation in Quartus II

Objectives

The objectives of this lab are as follows:

Getting familiar with the concept of using the computer as an experimental tool, to enforce the theory learned in class.
Learning to use truth tables, logic expressions and circuit design. We will apply that knowledge in using the Waveform Editor and see how they all relate to each other.

Reference Files for Lab

Step 1

We will look at a simple AND Circuit in this step. Download the zip file. For this lab, the Quartus II projects have been created for you. Open the lab3bStep1.qpf file and double click on lab3bStep1.bdf to view the design. This circuit has already been made for you, and it should have two inputs labeled A and B connected to an AND gate.

Create an output pin for the output of the AND gate. To do this, double click the left mouse button on the blank area to the right of the circuit. This will bring up the Enter Symbol dialog. In the Name: text field type output and press OK. Click the left button again to place the pin to the left of the gate in your design. Drag the pin over so that it is adjacent to the output of the AND gate. This should connect them. To verify that they are connected, drag the output pin to the right, and a wire should appear connecting it to the gate. (Alternately, you may use the wire tool, , on the toolbar to the left of the design to draw a wire connecting the gate output to the output pin).

Renaming the pin can be done by double clicking on the pin. Rename the output pin to C.

When you are finished laying out your circuit you will need to compile it.

Waveform Editor

You will now test the behavior of the circuit. To do this, instead of downloading the design to board, we will use Quartus II to simulate the operation of the circuit (hence, no pin assignments are necessary). You will be using the Waveform Editor to create a Vector Waveform File (*.vwf), which allows you to program inputs to test the design. This file will be used as the input for the Simulator to run and the result will be recorded in the same file.

Select (Flile -> New) then select the Other Files tab then select Vector Waveform File to create a simulator waveform file.

An empty waveform editor file will be opened for you.

Next, select (View -> Fit in Window) to view the whole simulation duration in the current window.
Right click anywhere under the Name column and a menu will pop up.
Select Insert Nodes or Bus… from the menu, and a dialog box will appear.
Select Node Finder… then set Filter to Pins:all. and click on the List button.
Upon clicking the List button, the Nodes Found column will show a list of input and output nodes available. Click on the >> button to add the whole list into the Selected Nodes column, which will be added to the *.vwf file when you click OK, and then click OK again. This process allows you to select the inputs and outputs you want to monitor in the corresponding waveforms. Now you are almost ready to run the simulator, but first, we need to assign the inputs A and B some values.
In the Name column, left click near the input named B. Select the area between 100 and 200ns with the mouse’s left cursor until it becomes blue, and then right click.
This will bring up a menu of options. Select Value -> Forcing High (1). This will only change the value of the input B from 0 to 1. The value of the output C won’t be updated until we run the simulation. The values of A and B you are using should correspond to the Truth Table in the answer sheet and should change every 100ns.
Finally, select (File Save As) and save the waveform file as lab3bStep1.vwf. You are now ready to simulate. You can close the Waveform Editor

Simulation

· Select (Tools -> Simulator Tool) to run the simulator.

· When the Simulator dialog box appears, make sure that the Simulation Input file is lab3bStep1.vwf.

· There are two modes the simulator can run in, Timing and Functional. In Timing mode, the simulator models the gate delays as they would occur in hardware. In this mode, you will see a delay between when the time inputs change to the time when that change is reflected on the outputs. For this lab, however, we are only concerned with the functional behavior of the circuits, as thus we will be using the Functional mode. If you wish, you may experiment with running the simulator in timing mode and observing the differences.

· Select Functional for the simulation mode in the top dropdown box. Click the Generate Functional Simulation Netlist button to the right of the box. This generates the netlist that will be used in the simulation. If you don’t click this button, you will get an error when you try to run the simulation.

· To run the simulation, simply click on the Start button. Click on Report button in order to see the simulation result. If you cannot see the complete waveform within the current window, select View -> Fit it Window (or ctrl-w).

The Answer Sheet has a Truth Table for this circuit. Run the simulation and record the results for the circuit’s output on the right column of the Truth Table. When you are done, review your results with the TA, and have the TA sign his initials in your sheet. Close the lab3bStep1 files.

Step 2

We will now look at two more complex circuits. Open the .qpf files and follow the instructions.

Ø Circuit 1

§ Open the lab3bStep2.qpf file.

Even though this circuit is larger, its behavior can still be shown on a Truth Table. The circuit has multiple Logic Gates, a single output, and three inputs. You do not have to add anything to this circuit.

§ Run the circuit simulation, and record the circuit’s behavior on your answer sheet.

You can discuss the results with your lab partner and the TA. When you are done, have the TA mark his/her initials next to your answers.

Ø Circuit 2

§ Open the lab3bStep3.qpf in Quartus II. Notice that the Truth Table on the answer sheet for this circuit is blank.

§ You need to fill in all possible input and output combinations in the Truth Table.

§ Use the Waveform Editor to toggle the inputs on the gates to determine how all the input combinations affect the output**.

§ Record each input combination and resulting output.

**NOTE: There are several different ways of entering all possible combinations of input into the .vwf file. One shortcut you may wish to employ is to assign a clock to each input. To do this, left click to select an input (A, B, or C) after you have added it to the vector waveform file. Then right click on it, and select value | Clock…. For this application, we only need to modify the Period setting. Give the clock for input A a period of 100 ns, B a period of 200 ns, and C a period of 400 ns. Notice that by 800 ns, all possible combinations of input have been cycled through.

In general, for n inputs, x₁-x_n, assign x₁ a clock with period T, x₂ a clock with period 2 T, x₃ 4 T, etc. up to x_n with period 2^(n-1) T.

Discuss the results with your lab partner and the TA. When you are done, have the TA mark his/her initials next to your answers, close all files and have a good rest of the day.