CprE 381 Homework #2

Reading Assignment: Chapters 4 and 5.1-5.4 (Single cycle implementation)

 

P1. (50 points) Complete the Lab02a and Lab02b and submit Verilog code for your TA to grade.

 

P2. (10 points) Problem 4.8 in the book.

 

P3. (10 points) Problem 4.11 in the book.

 

P4. (15 points) In the embedded market, where cost is crucial, processors sometimes implement floating point only in software. We are interested in two implementations of a computer, one with and one without special floating-point hardware. Consider a program, P, with the following mix of operations:

 

Floating-point multiply 10%

Floating-point add 15%

Floating-point divide 5%

Integer instructions 70%

 

Computer MFP (computer with floating point) has floating-point hardware and can therefore implement the floating-point operations directly. It requires the following number of clock cycles for each instruction class:

 

Floating-point multiply 6

Floating-point add 4

Floating-point divide 20

Integer instructions 2

 

Computer MNFP (computer with no floating point) has no floating-point hardware and so must emulate the floating-point operations using integer instructions. The integer instructions all take 2 clock cycles. The number of integer instructions needed to implement each of the floating-point operations is as follows:

 

Floating-point multiply 30

Floating-point add 20

Floating-point divide 50

 

Both computers have a clock rate of 1000 MHz.  Find the native MIPS ratings for both computers.

 

P5. (15 points) You are the lead designer of a new processor. The processor design and compiler are complete, and now you must decide whether to produce the current design as it stands or spend additional time to improve it. You discuss this problem with your hardware engineering team and arrive at the following options:

 

  1. Leave the design as it stands. Call this base computer Mbase. It has a clock rate of 500 MHz, and the following measurements have been made using a simulator:

INST CLASS  Clock Cycle     Frequency

A                                 2          40%

B                                  3          25%

C                                 3          25%

D                                 5          10%

 

  1. Optimize the hardware.The hardware team claims that it can improve the processor design to give it a clock rate of 600 MHz. Call this computer Mopt. The following measurements were made using a simulator for Mopt:

IINST CLASS Clock Cycle     Frequency

A                                 2          40%

B                                  2          25%

C                                 3          25%

D                                 4          10%

 

What is the CPI for each computer?