CPRE 381: Digital Systems, Logic, Programming
Spring 2006
HW#9
Due Date: Monday, April 3
Recall the 3-deep (K/U, I.E.) stack with the status register of MIPS-1 architecture discussed in the class. I had mentioned in the class that if the nested exceptions go more than three deep, these two bits (K/U, I.E.) need to be saved on the stack. Show an exception handler that does such a saving (only the relevant program fragment). Should the exception handler keep track of current nesting depth and only save on nesting depth higher than 3 or should it always save on the stack? The restoration part is bit more tricky. Recall that rfe instruction restores the rightmost two entries (K/U, I.E.). How would the epilog of the exception handler put in the leftmost (K/U, I.E.) pair? The complicating factor is that the moment rfe is executed, you may end up losing kernel privileges (and hence access rights to the status register)!
Why are exception handlers executed in higher privilege levels? Argue both the pros and cons of this design decision.
Write the prioritization part of the exception handler for MIPS for the following priority scheme (in assembly). The priority order (in decreasing priority order) is as follows: SW1, SW0, HW5, HW2, HW4, HW1, HW3, HW0.
Consider the following example of an exception handler (program fragment) from MIPS manual, Page 25.