CPR E 381x/382x - Lab 5b
Forwarding
and Hazard Detection Unit Design
1. Objectives
The purpose of this lab is to design forwarding and
hazard detection unit so that you can put these two units into the pipelined
cpu design next lab.
1.1 Reference Files For Lab
2. Prelab
Read the relevant sections of your textbook about data
hazards and forwarding and understand how the two units work in the pipelined
processor.
3. Setup
As
usual, create the folder in your home directory U:\CPRE381\Labw05a, and then two sub-folders ~\hazard, ~\forward.
The forward unit with required multiplexers selects
register input to ALU in ALU stage. The hazard detection unit inserts a NOP
instruction between a load word instruction and a subsequent instruction that
needs to read the register being loaded.
4. Forwarding Unit
Design a forwarding unit as follows (note that it
consists of only combinatorial logic):
FORWARD
(IDEXRA1, IDEXRA2, EXMEMWA, MEMWBWA, EXMEMWRF, MEMWBWRF, IDEXRD1, IDEXRD2,
EXMEMWD, MEMWBWD, ALUIND1, ALUIND2).
Variable |
Meaning |
IDEXRA1, IDEXRA2 |
4-bit addresses of registers just read from
register file |
IDEXRD1, EDEXRD2 |
16-bit values that are the contents of the
registers read |
EXMEMWA, MEMWBWA |
4-bit addresses of the registers that could be written
by the instructions in those stages |
EXMEMWD, MEMWBWD |
Corresponding (the last row) 16-bit data values |
EXMEMWRF, MEMWBWRF |
Values of the signals indicating if the
instructions in those stages will be writing into the register file |
ALUIND1, ALUIND2 |
Values ALU stage must use for actual computation |
5. Hazard Detection
Design
a hazard detection module as follows:
HAZARD (IDEXMR, IDEXWA,
IFIDRA1, IFIDRA2, IFIDWE, INHINC, NOP)
IDEXMR |
1-bit indicator if instruction
in ID/EX is a memory read |
IDEXWA |
4-bit register address the
ID/EX inst is writing |
IFIDRA1, IFIDRA2 |
Two 4-bit register
addresses being read in ID stage |
IFIDWE |
1-bit value enabling
writing to the IF/ID register by IF |
INHINC |
1-bit signal inhibiting
the incrementing of the PC |
NOP |
1-bit MUX control choosing
the control bits into the ID/EX reg |
Show
your TA the code for your FORWARD and HAZARD modules and their tests.