Fundamentals of Digital Logic with Verilog
Design
Stephen Brown and Zvonko Vranesic
Computer Organization and Design: The Hardware/Software Interface, Latest (3rd) Edition,
D. A. Patterson and J. L. Hennessy, Morgan Kaufmann, 1998.
Implementing a processor, Develop a memory system, develop a single cycle implementation of processor, discuss timing issue and wastage and lay out plan for multi-cycle implementation, control machine for multi-cycle implementation, performance issues and performance comparison, foundation for pipelining, pipeline implementation, hazards, and forwarding, pipeline control, branch hazards, superscalar architecture, memory system caching, general I/O system, buses, general exception & interrupt handling, precise exceptions, and interaction with processor pipeline, Input/Output peripheral devices, IO device Interfacing, Memory mapped IO, Motorola Interrupt Handling, vectored interrupts, priority encoders, overall interrupt handling system organization, PPC 555 interrupt handling system, Timers, periodic interrupt timer, programming & control, timer driven applications, use of analog to digital converter, programming and operation, Time Processing Unit (TPU), embedded computing, and introduction to embedded computing domains. A project demonstrating all that you learnt.